Insulation trenches in silicon wafers, e.g. in SOI silicon wafers, are used in order to electrically insulate areas which are at a different potential and comprise different components (e.g. transistors) or complete circuit blocks which are at a different potential from each other. Here, the insulation trench may e.g. enclose the component to be insulated or the area to be insulated in an annular fashion as this is e.g. illustrated by U.S. Pat. No. 5,734,192 A or U.S. Pat. No. 6,394,638 B1. A trench structure is described in U.S. Pat. No. 5,283,461 A, in which the components to be insulated are separated by a network of insulation trenches.
FIG. 1a shows a relevant arrangement of insulation trenches. There the insulation trench 10 with a width 14 is in each case surrounded on both sides by insulated islands 12a to 12d. If, as shown in FIG. 1a, cross-shaped or, as shown in FIG. 1b, T-shaped “meeting points” of the insulation trenches 11 develop, a diagonal width 16 of the insulation trench is formed at the “point of intersection”. Here, the diagonal width 16 at the meeting point is substantially greater (root from double the square of the width 14) than the width 14 of each individual insulation trench that extends in a straight line; with a width “a” for both trenches the maximum distance is approx. 1.4 times greater than the width of each trench. With the T meeting point the insulated areas are 12a, 12d and the larger area is 12e. 
U.S. Pat. No. 6,524,928 B1, cf. FIG. 2, e.g. describes the structure of the insulation trench 10. The starting material is the SOI wafer consisting of a carrier disk 20, the active SOI layer 24 and the buried oxide 22 which insulates the carrier disk 20 from the active SOI layer 24 used for active components. At first, an insulation layer 26, e.g. a silicon dioxide as a dielectric, is applied onto the side walls of the etched insulation trench. Subsequently, the insulation trench is filled with a filling material 28, e.g. polysilicon, and leveled at the surface 28′.
The deposition of the filling layer 28 for filling the insulation trench is e.g. carried out by means of chemo-physical deposition processes (CVD or PVD processes). Since the insulation trench is filled up from both trench sides in the deposition of the filling layer, a layer thickness of at least half the width 14 is theoretically necessary in order to fill the straight insulation trench without points of intersection. However, this is not sufficient for a complete filling of the entire insulation trench; since the intersection area and, thus, the diagonal 16 must also be taken into consideration for a complete filling. Thus, the layer thickness required for this is at least half the width 16 and, thus, is substantially greater than the layer thickness which would be required for filling the trench width 14. However, a greater layer thickness means longer process times and, thus, higher process costs.
It is desirable to obtain a layout of the insulation trench with a minimum width in order to be able to already fill the trench with smaller layer thicknesses (with lower deposition times and thus lower costs). On the other hand, a certain aspect ratio and, thus, a minimum width of the trench with a given thickness of the active layer is required for a stable etching process of the trench. Thus, the requirement of a minimum width cannot be complied with by a simple reduction of the width of an insulation trench.
Structures are described in DE 10 2005 034 A1 and DE 10 2005 059 035 A1 (Lerner, Eckoldt, X-Fab AG), in which the width 16 is locally reduced at the point of intersection due to the fact that a central island “raised in a column-shaped fashion” remains during the trench etching. Due to this, the diagonal is reduced in the intersection area and less polysilicon is required for completely filling the trench everywhere.
In the case of greater layer thicknesses of the active layer, e.g. silicon layer, of e.g. 50 μm and more, in which the width of the trench 14 is typically only a few micrometers, e.g. 3 μm to 4 μm, a column with a height of 50 μm (and more) and a width 32 of only about 2 μm would be required as the central island. Thus, the requirement results for the trench etching process that a so-called notching must absolutely be avoided, where due to the backscatter of the etching ions of the charged, buried oxide in the side wall of the trench at the low end of the side wall of the trench is laterally etched. Otherwise, the low end of the central island would be slightly etched and/or the central island would be completely etched free. Even with an—assumed—perfect trench etching such a central island with a low end area of about 2 μm by 2 μm and a height of 50 μm is mechanically very sensitive.